Synthesis of single-output space compactors for scan-based sequential circuits

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dc.contributor.authorBhattacharya, Bhargab B
dc.contributor.authorDmitriev, Alexej
dc.contributor.authorGossel, Michael
dc.contributor.authorChakrabarty, Krishnendu
dc.date.accessioned2012-11-19T12:27:26Z
dc.date.available2012-11-19T12:27:26Z
dc.date.issued2002-10
dc.identifier.citationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems,v.21,no.10,p.1171-1179en_US
dc.identifier.urihttp://hdl.handle.net/10263/4902
dc.language.isoenen_US
dc.subjectSynthesisen_US
dc.subjectToscan-based IP coresen_US
dc.subjectspace compactorsen_US
dc.titleSynthesis of single-output space compactors for scan-based sequential circuitsen_US
dc.typeArticleen_US

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