Tree-based hybrid scan architecture for VLSI testing
| dc.contributor.author | Lahiri, Subhra | |
| dc.date.accessioned | 2016-07-06T17:31:45Z | |
| dc.date.available | 2016-07-06T17:31:45Z | |
| dc.date.issued | 2007 | |
| dc.description | Dissertation under the supervision of Prof. Bhargab B. Bhattacharya | en_US |
| dc.identifier.citation | 44p. | en_US |
| dc.identifier.uri | http://hdl.handle.net/10263/6374 | |
| dc.language.iso | en | en_US |
| dc.publisher | Indian Statistical Institute, Kolkata | en_US |
| dc.relation.ispartofseries | Dissertation;2007-211 | |
| dc.subject | Hybrid scan | en_US |
| dc.subject | DFT | en_US |
| dc.subject | Energy/power reduction | en_US |
| dc.subject | ISCAS-89 | en_US |
| dc.title | Tree-based hybrid scan architecture for VLSI testing | en_US |
| dc.type | Thesis | en_US |
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