Parallel system design for time- delay neural networks

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Parallel system design for time- delay neural networks-IEEETOSMAC-30-2-2000-p 265-275.pdf.pdf (1.05 MB)

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2000

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Parallel computing, Pipelined architecture, Time- delay neural networks, Speech recognition

Citation

IEEETOSMAC, v 30, no 2, p 265-275

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http://hdl.handle.net/10263/5339

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Computer Science

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