Partial reconfiguration of field programmable gate array devices using xilinx architecture

No Thumbnail Available

Date

2007

Journal Title

Journal ISSN

Volume Title

Publisher

Indian Statistical Institute, Kolkata

Abstract

Description

Dissertation under the supervision of Dr. Susmita Sur-Koley

Keywords

FPGA, Partitioner, Algorithms, Dynamic reconfiguration, Partial reconfiguration, Xilinx architecture

Citation

41p.

Endorsement

Review

Supplemented By

Referenced By