A deadlock communication kernel for loop architecture

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dc.contributor.authorPramanik, P
dc.contributor.authorDas, P K
dc.contributor.authorBandyopadhyay, A K
dc.contributor.authorFay, D Q M
dc.date.accessioned2014-01-08T08:14:26Z
dc.date.available2014-01-08T08:14:26Z
dc.date.issued1991
dc.identifier.citationInformation Processing Letters, v 38, p 157-161en_US
dc.identifier.urihttp://hdl.handle.net/10263/5747
dc.language.isoenen_US
dc.subjectOperating systemsen_US
dc.subjectParallel processingen_US
dc.subjectMassage-passing multiprocessorsen_US
dc.subjectDeadlock preventionen_US
dc.titleA deadlock communication kernel for loop architectureen_US
dc.typeArticleen_US

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