On the detection of missing gate faults in reversible circuits by a universal test set

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dc.contributor.authorRahaman, H
dc.contributor.authorKole, D K
dc.contributor.authorDas, D K
dc.contributor.authorBhattacharya, Bhargab B
dc.date.accessioned2011-08-11T11:46:59Z
dc.date.available2011-08-11T11:46:59Z
dc.date.issued2008
dc.identifier.citationProceedings of 21st international conference on VLSI design,P163-168en_US
dc.identifier.urihttp://hdl.handle.net/10263/2493
dc.language.isoenen_US
dc.subjectMissing gate faultsen_US
dc.subjectQuantum computingen_US
dc.subjectReversible logicen_US
dc.subjectTestable designen_US
dc.subjectUniversal test seten_US
dc.titleOn the detection of missing gate faults in reversible circuits by a universal test seten_US
dc.typeArticleen_US

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