Testable design of RMC networks with at and bridging faults

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IP-132-3-1985-P155-162.pdf (2.85 MB)

Date

1985

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Keywords

Networks, Logic, Fault location, Testable design

Citation

IEE Proceedings, V.132. No.3, P 155-162

URI

http://hdl.handle.net/10263/5920

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Computer Science

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