Some combinatorial design in VLSI architectures and statistics

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dc.contributor.authorMaity, Soumen
dc.date.accessioned2012-05-01T15:59:39Z
dc.date.available2012-05-01T15:59:39Z
dc.date.issued2002-10
dc.descriptionThis thesis is under the supervision of Prof.Bimal K Royen_US
dc.identifier.citation125p,iven_US
dc.identifier.urihttp://hdl.handle.net/10263/3642
dc.language.isoenen_US
dc.publisherIndian Statistical Institute,Calcuttaen_US
dc.relation.ispartofseriesISI Phd thesis;TH125
dc.subjectVLSI architectureen_US
dc.subjectVLSI linear arraysen_US
dc.subjectCombinatorial optimizationen_US
dc.titleSome combinatorial design in VLSI architectures and statisticsen_US
dc.typeThesisen_US

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